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34VL02
8.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 8-1.
TABLE 8-1:
PIN FUNCTION TABLE
Symbol
A0
A1
A2
V SS
SDA
SCL
WP
V CC
PDIP
1
2
3
4
5
6
7
8
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
MSOP
1
2
3
4
5
6
7
8
TDFN
1
2
3
4
5
6
7
8
SOT-23
5
4
NC
2
3
1
NC
6
Description
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.5V to 3.6V Power Supply
8.1
A0, A1, A2
8.3
Serial Clock (SCL)
The levels on these inputs are compared with the
corresponding bits in the slave address. The chip is
This input is used to synchronize the data transfer to
and from the device.
selected if the compare is true.
Up to eight 34VL02 devices may be connected to the
8.4
Write-Protect (WP)
same bus by using different Chip Select bit
combinations. These inputs must be connected to
either V SS or V CC .
The A0 pin is also used to detect V HV .
This is the hardware write-protect pin. It can be tied to
V CC or V SS . If tied to V CC , the hardware write protection
is enabled. If the WP pin is tied to V SS , the hardware
write protection is disabled.
8.2
Serial Address/Data Input/Output
(SDA)
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal. Therefore, the SDA bus requires a pull-
up resistor to V CC (typical 10 k Ω for 100 kHz, 2 k Ω for
400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
DS22079A-page 14
? 2008 Microchip Technology Inc.
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